In recent years, there have been significant improvements and other advances in Integrated Circuit (IC) technology, such as the technology for Application Specific Integrated Circuits (ASICs), Reduced Instruction Set Computing (RISC) microprocessors, Field Programmable Gate Arrays (FPGAs), Programmable Logic Devices (PLDs), and/or the like. For example, these developments have resulted in faster, smaller, and cheaper ICs.
In conjunction with these advances in IC technology, the Electronic Design Automation (EDA) industry has developed tools that both fuel and benefit from these advances. For example, logic synthesis tools have been developed that enable a circuit to be specified at a one level of abstraction then translated to another level of abstraction, e.g., a lower level of abstraction.
Certain logic synthesis tools may be employed to perform these and other translations. For example, such tools may be employed to translate a Register Transfer Level (RTL) language description (e.g., a Verilog, Very-High-Speed Integrated Circuits Hardware Description Language (VHDL), or Advanced Boolean Expression Language (ABEL) description) into a gate level description that can more easily be implemented in an IC. As another example, behavioral synthesis tools may be employed to synthesize a behavioral description of a circuit (e.g., a SystemC or SpecC description) into a RTL or gate level description.